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Power Deregulation

My research during Master's programme at Northwestern University, later published at CODES-ISSS conference in 2007. More details on this page.

Initial purpose of this page was to share experimental procedures and results used for the publication Power Deregulation. Though not all data will be made available due to confidentiality, I will try to make simple tutorials for all experiments that were taken for this research.

Power Deregulation

[Abstract] In battery-powered embedded systems, dedicated circuitry is used to convert stored energy into a form that can be directly used by processors. These power regulation devices seek to mask non-ideal aspects of the battery and present an ideal, fixed-voltage power source to the processor. However, this comes at a high price in terms of form factor, component cost, and energy efficiency. We describe and evaluate a new method for eliminating voltage regulation circuitry from battery-powered embedded systems. This method makes use of power gating, frequency scaling, and thread migration in chip-level multiprocessors to dynamically adjust to varying battery voltage. The key advantages of this approach are reduction in printed circuit board area (by 1/3 in many embedded applications) and the elimination of bulky unreliable discrete components such as electrolytic capacitors while maintaining similar battery lifespan. We have evaluated the power consumption, performance, and reliability implications of the proposed method using analytical techniques, power models, and detailed full-system simulation of numerous benchmarks from the ALPBench and MediaBench benchmark suites. For a number of battery technologies, the proposed technique holds the potential to eliminate power regulation circuitry and maintain battery lifespan while maintaining the same performance as systems using Buck-Boost voltage regulators.

This paper had been submitted to The International Conference on Hardware-Software Codesign and System Synthesis, abbreviated CODES+ISSS. It is a conference for design of embedded systems hardware, software and tools, took place in Salzburg, Austria on October 1-3, 2007. The work was done in collaboration with Professor Robert Dick and Professor Russ Joseph at Northwestern University.



M5 processor simulation environment

M5 processor simulator was used mostly for the Power Deregulation research for two primary reasons. It can simulate multi-processor environment, and it's free. Compared to other processor simulators tried, it is considerably light, but powerful and gives detailed statistics. As I know so far, it runs on any unix/linux systems on x86 platform.

  1. Download m5 from their download page
  2. Install SCons, which is a powerful replacement for make
  3. and use scons to build a m5 processor simulator as the following
scons build/<arch>_<mode>/m5.<binary>
 % cd m5
 % scons build/ALPHA_FS/m5.debug
 scons: Reading SConscript files ...
 Checking for C header file fenv.h... yes
 Building in /tmp/m5/build/ALPHA_FS
 Options file /tmp/m5/build/options/ALPHA_FS not found,
   using defaults in build_opts/ALPHA_FS
 Compiling in ALPHA_FS with MySQL support.
 scons: done reading SConscript files.
 scons: Building targets ...
 g++ -o build/ALPHA_FS/base/circlebuf.do -c -pipe -fno-strict-aliasing
    -Wall -Wno-sign-compare -Werror -Wundef -g3 -gdwarf-2 -O0
    -DTHE_ISA=ALPHA_ISA -DDEBUG -Iext/dnet -I/usr/include/python2.4
    -Ibuild/libelf/include -I/usr/include/mysql -Ibuild/ALPHA_FS
    build/ALPHA_FS/base/circlebuf.cc

Also, the Wisconsin CS department has an useful list of other computer architecture simulators


Benchmark testing

  • Benchmark test results

ALPBench benchmark suite

ALPBench is set of parallelized complex media applications, modified to expose thread-level and data-level parallelism. In order to have it executable on M5 simulator, ALPBench had been compiled for Alpha instruction set architecture using the following cross compiler, or by following this reference.

  • Alpha cross compiler acquired form UNSW site some years ago, now that it disappeared, I am going to have my local copy available for downloading.

And of course, you are welcome to use this for own experiments. Includes MPEG decoder, MPEG encoder and Sphinx3 speech recognition benchmarks.


Battery life simulation

A battery life simulator written in Python, was used to calculate how long a particular type of battery would last under various processor setups tested. The input data, power dissipation metrics(static/dynamic) were taken from M5 processor simulation results, while various battery-related literature provided battery capacity and dissipation trends for different types of batteries. Test script available for other possible usage.

  • Relative power dissipation calculation

  • Power dissipation in Watts with variation in numbers and performance frequency

  • Battery lifetime in seconds for various battery technology

Documentation resources

  • Svn Repository
 svn co svn+ssh://ziyang.eecs.northwestern.edu/fserver/svn/deregulation/trunk deregulation
 gnuplot < ***.gp > ***.eps
 pl $$$.pls -eps -o $$$.eps
Ċ
Hoon Kim,
Oct 9, 2011, 1:51 PM
Ċ
Hoon Kim,
Oct 9, 2011, 1:48 PM
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