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VHDL

Microprocessor Laboratory

The following are lab reports for the four projects that were done for ECE 412 Microprocessor Laboratory at University of Illinois in Spring 2005. All projects were coded with Mentor Graphics HDL Designer in VHDL, and tested on Xilinx 2 PowerXUP FPGA boards. All documents are in pdf format, including source snippets and results.

  1. Introduction to FPGA
  2. Introduction to Embedded Systems Design
  3. Image Capture Hardware
  4. Bluetooth Communication Overview

Digital Systems Laboratory

The following are VHDL source files for the last four projects that were done for ECE 249(currently 385) Digital Systems Laboratory at University of Illinois in Spring 2004. All projects were coded with Mentor Graphics HDL Designer in VHDL, and tested on Altera Quartus II FPGA.

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4bit-multiplier.zip
(3k)
Hoon Kim,
Oct 9, 2011, 1:18 PM
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Computer249.zip
(599k)
Hoon Kim,
Oct 9, 2011, 1:19 PM
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Logic_processor.zip
(57k)
Hoon Kim,
Oct 9, 2011, 1:18 PM
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PS2.zip
(488k)
Hoon Kim,
Oct 9, 2011, 1:18 PM
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mp1cp2.vhd
(2k)
Hoon Kim,
Oct 9, 2011, 1:08 PM
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mp1cp3.vhd
(11k)
Hoon Kim,
Oct 9, 2011, 1:08 PM
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mp2cp1.vhd
(11k)
Hoon Kim,
Oct 9, 2011, 1:09 PM
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mp2cp2.vhd
(8k)
Hoon Kim,
Oct 9, 2011, 1:09 PM
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mp3-YUV2RGB.vhd
(5k)
Hoon Kim,
Oct 9, 2011, 1:13 PM
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mp3cp1.vhd
(4k)
Hoon Kim,
Oct 9, 2011, 1:10 PM
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mp3cp2.vhd
(9k)
Hoon Kim,
Oct 9, 2011, 1:10 PM
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receiver_mp4_recv.vhd
(6k)
Hoon Kim,
Oct 9, 2011, 1:14 PM
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sender_mp4_send.vhd
(5k)
Hoon Kim,
Oct 9, 2011, 1:14 PM
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